Unisantis Electronics unveils 12-EUV Layer Surrounding Gate Transistor (SGT) for Vertical 6-T SRAM: 5-nm-class Technology for Ultra-Density Logic Devices at VLSI Technology Symposium 2019

2019 Symposium on VLSI Technology and Circuits, Kyoto Japan

12-EUV Layer Surrounding Gate Transistor (SGT) for Vertical 6-T SRAM: 5-nm-class Technology for Ultra-Density Logic Devices

VLSI 2019 Conference Paper 🔗

VLSI2019_Ver-2.2

VLSI 2019 Presentation – Unisantis / IMEC 🔗

VLSI-Presentation-Unisantis

 

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